1. Field of the Invention
The present invention relates to a method for producing a CMOS circuit having both an n-channel MOS transistor and a p-channel MOS transistor formed in a semiconductor substrate wherein a masking step is alleviated in the formation of the CMOS circuit thus reducing the overall process outlay.
2. Description of the Prior Art
In the course of miniaturizing components with a view toward increased component density, both lateral and vertical dimensions are reduced. In the case of MOS transistors, this means that not only the lateral dimensions of the gate electrode and the channel length but also the depth of the source/drain regions is reduced.
EP 0 268 941 B1 has proposed a MOS field-effect transistor structure with shallow source/drain zones. The MOS field-effect transistor is arranged between field oxide regions. Monocrystalline, doped silicon layers are arranged between the gate electrode of the MOS transistor and the field oxide regions. Such silicon layers are produced by means of selective epitaxy and service as diffusion sources for producing the source/drain regions. They also form the connection regions with respect to the source/drain terminals arranged above them.
In order to produce a CMOS circuit with complementary MOS transistors, it was proposed in EP 0 268 941 B1, that the monocrystalline doped silicon layers produced by means of selective epitaxy be doped differently. This can be done either by forming an undoped silicon layer or by means of selective epitaxy, both in the region of the n-channel transistors and in the region of the p-channel transistors. The silicon layers are then doped differently, depending on the transistor type, by means of implantation using two masks. As an alternative, n.sup.+ -doped, monocrystalline silicon layers are, first of all, produced by means of selective epitaxy. In this case, regions for p-channel transistors are covered by a mask. Afterwards, the regions for n-channel transistors are covered by a further mask and p.sup.+ -doped n-crystalline silicon layers are formed by means of selective epitaxy. In both cases, two mask steps are necessary to produce the differently doped source/drain regions.